1. Field of the Invention
The present invention relates to a reference voltage generator for a ferroelectric material memory device. More particularly, it relates to a reference voltage generator for a ferroelectric material memory device which alternately stores a reference data stored in one pair of reference cells of a reference voltage generator of a ferroelectric material memory element, thus enhancing the durability of the memory chip.
2. Description of the Prior Art
Conventionally, a memory device made of ferroelectric material has a characteristic of maintaining a constant electric charge quantity even if no potential difference exists between both ends of a ferroelectric capacitor. Thus, a non-volatile memory can be manufactured by using this characteristic.
FIG. 1A represents a symbol of a capacitor made of a ferroelectric material; and FIG. 1B is a hysteresis loop illustrating a relationship between voltage and charge quantity of the ferroelectric material capacitor shown in FIG. 1A.
As shown in the hysteresis loop of FIG. 1B, although there is no potential difference between both ends (a and b) of the ferroelectric material capacitor of FIG. 1A, the ferroelectric material capacitor storing data "1" can be present in polarization status P1, and the ferroelectric material capacitor storing data "0" can be present in polarization status P3.
If a sufficient negative voltage is applied to both ends (a and b) of the ferroelectric material capacitor in order to read a stored data, a polarization status of the ferroelectric material capacitor storing the data "1" is changed from a first polarization status P1 to a second polarization status P2 along the hysteresis loop, so that the ferroelectric material capacitor generates a charge by Qm1. Thereafter, if a voltage difference between both ends (a and b) is removed (i.e., becomes zero), the second polarization status P2 is changed to a third polarization status P3. Thereafter, the third polarization status P3 returns to the first polarization status P1 by the prosecution of the process of a data restoring step.
A polarization status of the ferroelectric material capacitor storing the data "0" changes from the third polarization status P3 to the second polarization status P2, so that the ferroelectric material capacitor generates a charge by Qm0. Then, the second polarization status P2 returns to the original status (i.e., the third polarization status P3) after performing a data restoring step.
In this case, a memory for storing a binary data can be constituted by sensing the difference between the two charge quantities of Qm1 and Qm0.
Various memory types have been constituted by using the above characteristic of the ferroelectric material capacitor.
FIG. 2 schematically illustrates a fatigue phenomenon having occurred in the ferroelectric material capacitor. As shown in FIG. 2, a hysteresis loop of an initial state ferroelectric material capacitor is indicated as a solid line. If a sufficient negative voltage is applied to the ferroelectric material capacitor, the ferroelectric material capacitor generates a charge by Q0.
A status of a deteriorated ferroelectric material capacitor, which is caused by many uses of a cell, is indicated as a dotted line in FIG. 2. However, as shown in Q1 of FIG. 2, a charge attenuation is gradually generated in the deteriorated ferroelectric material capacitor.
FIG. 3 is a circuit diagram of a conventional ferroelectric material memory device.
Referring to FIG. 3, if the conventional ferroelectric material memory device turns on a gate terminal of a switching transistor in order to read a stored data and is then driven by a plate voltage of a high level, each of bit lines has different voltages V0 and V1 in response to the data type (i.e., "0" or "1" ) stored in the cell.
Since the voltages V0 and V1 are small-signals, the voltages V0 and V1 should be amplified by using a sense amplifier.
In order to amplify the voltages V0 and V1, a reference voltage between the voltages V0 and V1 should be applied to a bit line bar.
That is, the conventional ferroelectric material memory device determines whether the voltage V0 or V1 of the bit line is lower or higher than the reference voltage applied to the bit line bar by using the sense amplifier. Thereafter, it determines whether the cell data is "0" or "1".
For reference, a typical reference voltage generator for making a reference voltage is disclosed in the Institute of Electrical and Electronic Engineers (IEEE) Solid Static Circuit, Vol.31, No.11, November 1996, pp.1625-1633.
Frequency of use of a reference cell used in the reference voltage generator becomes more increased in proportion to the number of cells within the memory cell array since the typical art uses only one reference voltage generator for a bit line of a memory cell array.
The ferroelectric material capacitor has a fatigue phenomenon wherein a holding charge quantity of the capacitor has a negative correlation with the number of times the capacitor is used. Therefore, the voltage value is also changed with the decrease of the charge quantity.
A reference voltage generator 20 shown in FIG. 3 always stores the data "0" in a capacitor C1, always stores the data "1" in a capacitor C2, and repeatedly reads these data. Accordingly, as the number of the times of the uses of the capacitors C1 and C2 is increased, the charge quantity decreases and a generated voltage value is also changed. Therefore, it is difficult to ensure a sensing margin in the conventional art, thereby lowering a reliability of a memory element.
In more detail, as shown in FIG. 4A which illustrates a signal diagram for driving the prior reference voltage generator, the ferroelectric material capacitor C1 storing the data "0" during a read/write operation repeats only a status of c.fwdarw.b.fwdarw.c, so that a capacitor's deterioration is seldom caused by the number of times of the use.
On the contrary, since the ferroelectric material capacitor C2 storing the data "1" repeats a status of a.fwdarw.b.fwdarw.c.fwdarw.d.fwdarw.a for every read/write operation, a charge attenuation caused by the fatigue phenomenon is easily generated as compared with the capacitor C1. Accordingly, as the number of times of the use of the capacitor C2 increases, it is difficult to ensure the sensing margin of the capacitor. Thereby, the reliability of the entire chip is downed, as shown in FIG. 4B which illustrates a voltage relation between both ends of the ferroelectric material capacitor by a driving signal.
Assuming that 1,024 memory cells are all connected to one reference voltage generator, a cell being used in the reference voltage generator can be deteriorated faster than a general memory cell by 1,024 times.